1. Field of the Invention
The present invention relates to the technique of a semiconductor device, an electrostatic discharge protection device, and an electrostatic breakdown preventing method, and more specifically, relates to the technique of insulation breakdown of an MOS transistor.
2. Description of the Related Art
In a semiconductor device, especially in an integrated circuit in which the circuit comprises an MOS transistor, a gate insulation breakdown may easily be caused by the electrostatic discharge from the outside to the signal input/output section, and therefore, it is indispensable to provide an electrostatic breakdown protective element to the input/output section.
FIG. 1 is a plan view showing an electrostatic discharge protection device of a conventional semiconductor device described in Japanese patent Application Laid-Open No. 2-238668, and FIG. 2 is a cross sectional view showing a conventional electrostatic breakdown protective element.
In these figures, numeral 3 denotes a gate electrode, 5 denotes a drain contact, 6 denotes a gate contact, 7 denotes a source contact, 8 denotes a well contact, 9 denotes a p.sup.+ diffusion layer for the connection to a p well, 10 denotes a source, 11 denotes a drain, 12 denotes a p well, 20 denotes an aluminum wiring for connecting the gate electrode to the well, 21 denotes a p.sup.+ diffusion layer for the connection to the well, and 22 denotes a contact hole for connecting the gate electrode to the well. Furthermore, 13 denotes a gate oxide film, and 14 denotes a field oxide film.
In this conventional technique, an internal circuit to be a protected element and an input/output pad are connected to the drain 11. The gate electrode 3 is connected to the p well 12 by the aluminum wiring 20, the contact hole 22, and the p.sup.+ diffusion layer 21. Furthermore, the p well 12 is connected to the ground electrode by the p.sup.+ diffusion layer 9.
The action of this electrostatic breakdown protective element will be described. When a high voltage is applied to the drain 11 connected to the input/output pad, a breakdown arises in the junction between the drain 11 and well 12, and a current flows from the drain 11 to the well 12, and the internal circuit is protected. Even if the potential of the p well 12 is raised by the current flowing into the p well 12 during the breakdown, the gate electrode 3 is connected to the p well 12, and the gate electrode 3 and the p well 12 have approximately the same potential, and therefore, it does not occur that the gate insulation film is broken by the difference in potential between the gate electrode 3 and the p well 12.
However, in the conventional electrostatic discharge protection device, the breakdown in the junction between the diffusion layer and the well is used for the electrostatic protection. The breakdown voltage of the junction depends on the impurity concentration of the junction portion, and generally, it is approximately 8 to 10 V. On the other hand, the gate oxide film of an MOS transistor is broken by an electric field approximately not less than 15 MV/cm, regardless of the film thickness. Therefore, if the gate oxide film is made to be thin by fining of the MOS transistor, the voltage to cause the gate insulation breakdown becomes lower than the breakdown voltage of the junction.
For example, in a gate oxide film having a film thickness of 4 nm, the gate oxide film causes a insulation breakdown at 6 V, and this is clearly a voltage lower than the breakdown voltage of the junction of 8 V. Consequently, in the case where the breakdown of the junction is used for the principle of the action of the protective element, it becomes impossible to protect the internal MOS transistor.